Silicon Dioxide Ring Innovations in TSV Structures: Analysis of Thermal-Mechanical and Signal Integrity for 3D Chip Applications

Through-silicon via (TSV) as a crucial interconnection microstructure in three-dimensional (3D) chip, have significantly enhanced device performance and reliability. However, the increasing interconnect density and operating frequency now pose substantial threats to TSVs’ thermal-mechanical and signal transmission reliability, leading to a reduction in the overall reliability of 3D chip. In this study, a novel TSV with silicon dioxide ring (SDR) structure is proposed, its anti-current leakage performance and transmission performance are proved to be superior than traditional TSV and their derivative. On the basis, the equivalent circuit model of the proposed TSV is established, and the influence of the location, height and thickness of SDR on the thermal-mechanical performance and signal integrity of the new TSV is deeply investigated through thermomechanical analysis, electromagnetic analysis and field-circuit collaborative analysis. Results show that SDRs position, thickness, and height mainly affect TSVs thermal stress distribution by changing the area enclosed by the SDR and the volume of the SDR itself, transverse thermal conductivity, and the heat storage capacity. A moderate increase in the distance between SDR and the Cu column can enhance insertion loss in direct current (DC) condition. The inner diameter, thickness and height of SDR have different influence mechanisms on the integrity of TSV. These findings provide valuable guidance for TSV optimization and reliability analysis.