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Design of a Novel Active Gate Drive Circuit to Enhance Current Sharing in Parallel-Connected MOSFETs for Low-Voltage Inverter Applications
Author(s) -
Berkay Keziban,
Murat Yilmaz
Publication year - 2025
Publication title -
ieee access
Language(s) - English
Resource type - Magazines
SCImago Journal Rank - 0.587
H-Index - 127
eISSN - 2169-3536
DOI - 10.1109/access.2025.3610144
Subject(s) - aerospace , bioengineering , communication, networking and broadcast technologies , components, circuits, devices and systems , computing and processing , engineered materials, dielectrics and plasmas , engineering profession , fields, waves and electromagnetics , general topics for engineers , geoscience , nuclear engineering , photonics and electrooptics , power, energy and industry applications , robotics and control systems , signal processing and analysis , transportation
Low-voltage systems offer advantages in terms of safety, cost-effectiveness, and ease of integration, making them a preferred choice for e-scooters, light electric vehicles (LEVs), and various small-scale and urban mobility applications. In such drive systems, low-voltage inverters powered by batteries operate under very high currents. To increase the output current capacity of the inverters and achieve higher power levels, the use of parallel-connected MOSFETs has become both important and widespread. Extensive investigations and studies have been conducted to examine the main causes of current imbalance in semiconductors, particularly the effects of parasitic factors originating from printed circuit boards (PCBs) and parameter variations due to the manufacturing processes of semiconductor switches on current distribution. Existing active and passive gate driver circuits in the literature were reviewed, and a new control method based on temperature and current feedback was developed to mitigate these effects. Within this scope, a hybrid active gate drive (AGD) circuit was proposed and designed to improve current sharing among parallel-connected MOSFETs. According to the modeling and analysis results, when the AGD is activated, current imbalance decreases from 25% to 5%. To experimentally test the proposed method, a PCB was designed and tested in a laboratory environment using the double pulse test (DPT) method. According to the DPT results, the current difference observed in the second switching event decreases from approximately 17% to 3% when the algorithm is activated. Based on the results obtained, the proposed gate driver has been shown to be effective in improving current sharing, reducing stress and power losses in MOSFETs, and enhancing thermal management and reliability.

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