Open AccessDifferential Injection Locked Frequency Divider with Dual Darlington Pairs for Wideband ÷4 Frequency Division in CMOS
Author(s) -
Akram Muhamad Rafli,
Muhammad Fakhri Mauludin,
Sanghun Lee,
Kunhee Cho,
Jusung Kim
Publication year - 2025
Publication title -
ieee access
Language(s) - English
Resource type - Magazines
SCImago Journal Rank - 0.587
H-Index - 127
eISSN - 2169-3536
DOI - 10.1109/access.2025.3590205
Subject(s) - aerospace , bioengineering , communication, networking and broadcast technologies , components, circuits, devices and systems , computing and processing , engineered materials, dielectrics and plasmas , engineering profession , fields, waves and electromagnetics , general topics for engineers , geoscience , nuclear engineering , photonics and electrooptics , power, energy and industry applications , robotics and control systems , signal processing and analysis , transportation
This paper presents a 4.08 mW injection-locked frequency divider (ILFD) achieving division-by- 4 with a 21.3% locking range (16.4-20.3 GHz) in 65 nm CMOS. The design employs dual CMOS Darlington pairs in a fully differential injection topology, simultaneously enhancing trans-conductance, switching speed, and power efficiency. Key innovations include a high-transit frequency ( f T ) topology for robust high-frequency division and optimized harmonic rejection. Measured results show consistent 12 dB phase noise reduction (20·log 10 (4)) across offsets up to 1 MHz, with harmonic rejection of 23.4 dB (3rd) and 49.3 dB (2nd) at 16.4 GHz. Competitive figures of merit of 0.95 GHz/mW and 19.4 GHz 2 /mW demonstrate state-of-the-art efficiency.
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