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Low temperature and radiation resistant JFET differential amplifiers circuits synthesis with increased common-mode rejection ratio
Author(s) -
Н. Н. Прокопенко,
I. V. Pakhomov,
Alexey A. Zhuk
Publication year - 2020
Publication title -
iop conference series. materials science and engineering
Language(s) - English
Resource type - Journals
eISSN - 1757-899X
pISSN - 1757-8981
DOI - 10.1088/1757-899x/862/3/032109
Subject(s) - jfet , differential amplifier , common mode rejection ratio , amplifier , electronic circuit , adder , differential (mechanical device) , electronic engineering , operational amplifier , computer science , electrical engineering , physics , engineering , transistor , voltage , field effect transistor , cmos , thermodynamics
We have had limits for transfer ratios of adder ∑1, when there are increased values of common-mode rejection ratio, for general function circuit of classic two stage JFET of differential amplifiers, including input differential stage and adder ∑ 1 output currents differential stage. We have considered three particular variants to synthesize differential amplifiers practical circuits based on current mirrors, folded cascodes and floating complementary differential stage. We have shown that differential amplifiers of floating complementary differential stage subclass is the most advanced to construct low noise analog circuits to process signals of sensors, operating in severe operating conditions (at low temperatures, initial radiation). Proposed circuit solutions are recommended for silicon and GaAs JFET technologies (including JFet, CJFet, CBiCJFet).

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