Open AccessA New One-selector One-resistor Verilog-A model for Circuit Simulsation
Author(s) -
Yong Dai,
Qi Min,
Feng Tao,
Wei Lu,
Fei Yang
Publication year - 2020
Publication title -
iop conference series. materials science and engineering
Language(s) - English
Resource type - Journals
eISSN - 1757-899X
pISSN - 1757-8981
DOI - 10.1088/1757-899x/790/1/012122
Subject(s) - reset (finance) , resistive random access memory , verilog , set (abstract data type) , resistor , computer science , point (geometry) , voltage , electronic engineering , topology (electrical circuits) , electrical engineering , mathematics , field programmable gate array , computer hardware , engineering , geometry , financial economics , economics , programming language
In this paper, a compact model of one-threshold switching selector (1S) one-bipolar resistive random-access memory (1R) is developed for 3D memory circuit simulation. Firstly, the mathematical formulas are presented to describe the two different states before and after the threshold switching for S. The formulas are expressed in Verilog-A to develop a S compact model. Secondly, the parameters (V th1 , V th2 , V op , α, β, R s ) in the S model are adjusted to match with R. Especially, V th1 and V th2 can be adjusted according to the set and the reset voltages of R. Lastly, simulations are conducted in 7T1R circuit and cross-point array performance of the new 1S1R Verilog-A model is analyzed to validate the model performance.