
Design and Implementation of Lifting Wavelet Transform Using Field Programmable Gate Arrays
Author(s) -
T. B. Taha,
Ruzelita Ngadiran,
Phaklen Ehkan
Publication year - 2020
Publication title -
iop conference series. materials science and engineering
Language(s) - English
Resource type - Journals
eISSN - 1757-899X
pISSN - 1757-8981
DOI - 10.1088/1757-899x/767/1/012041
Subject(s) - vhdl , field programmable gate array , computer science , wavelet transform , computer hardware , hardware description language , lifting scheme , discrete wavelet transform , wavelet , embedded system , artificial intelligence
Lifting Wavelet transform (LWT) has an extensive usage in different image processing applications as image compression and information hiding. LWT is considered a good solution for hardware designs as it relies only on integer calculations while applying the wavelet transform. In this paper, an FPGA design and implementation of LWT is presented, the implementation is achieved using VHDL coding without importing off-shelf components which make the proposed design applicable to a wide range of devices. The design is based on parallel execution to perform LWT implementation with real time response. The design utilized 421 logic registers of DE2 Cyclone II (EP2C35F672C6) FPGA device with 151.91MHz frequency.