z-logo
open-access-imgOpen Access
Effect of gate bias sweep rate on the threshold voltage of in-plane gate nanowire transistor
Author(s) -
H. X. Liu,
J. Li,
Rongri Tan
Publication year - 2018
Publication title -
iop conference series. materials science and engineering
Language(s) - English
Resource type - Journals
eISSN - 1757-899X
pISSN - 1757-8981
DOI - 10.1088/1757-899x/292/1/012059
Subject(s) - nanowire , materials science , threshold voltage , gate dielectric , transistor , optoelectronics , gate oxide , voltage , dielectric , electrical engineering , engineering

The content you want is available to Zendy users.

Already have an account? Click here to sign in.
Having issues? You can contact us here