Open AccessTuning and experimental assessment of second-order generalized integrator –frequency locked loop grid synchronization for single-phase grid assisted system
Author(s) -
Bhavik Brahmbhatt,
Hina Chandwani
Publication year - 2021
Publication title -
iop conference series. materials science and engineering
Language(s) - English
Resource type - Journals
eISSN - 1757-899X
pISSN - 1757-8981
DOI - 10.1088/1757-899x/1045/1/012019
Subject(s) - control theory (sociology) , phase locked loop , integrator , computer science , grid , settling time , filter (signal processing) , bandwidth (computing) , engineering , control engineering , step response , mathematics , control (management) , telecommunications , jitter , geometry , artificial intelligence , computer vision
The phase-locked loop (PLL) is an essential part of the grid-tied system to synchronize control of converter with grid voltage, particularly affects the converter stability as well as performance under weak grid conditions. During abnormality in a grid, its bandwidth ought to be a11dequately brought down to achieve appropriate disturbance rejection capability with a compromise to slower detection speed. The researchers have done intended work in advanced PLLs to improve phase-angle detection speed by modifying the pre/in-loop filtering stage. A most concerning challenge with the PLLs is the means by which to additionally provide superior dynamic performance and reduced settling time without bargaining stability of system along with the capability of disturbance elimination To overcome this challenge, this paper describes the second-order generalized integrator (SOGI-Frequency Look loop (FLL) which offers filtering capability like band-pass filter, low-pass filter, and notch filter for adaptive frequency tuning as well as an orthogonal signal generation for the grid-tied photovoltaic inverter. The impact of control parameters on their dynamic performance in SOGI-FLL is tabulated from a step response of frequency estimation by taking a frequncy shift. Furthermore, Low-cost DSP based STM32F407VGT the microcontroller is employed to implement a SOGI-FLL to test under adverse grid conditions using Waijung Block-set of SIMULINK/MATLAB. The experimental results of SOGI-FLL have proven superior dynamic performance over type-2 PLLs by choosing the appropriate value of the control parameter of SOGI-FLL.