Open AccessA Novel Error Free Dimensional Projection Coding
Author(s) -
Shaik Rafi,
Geluvaraj basavaraj,
Shaik Fairooz
Publication year - 2021
Publication title -
iop conference series. materials science and engineering
Language(s) - English
Resource type - Journals
eISSN - 1757-899X
pISSN - 1757-8981
DOI - 10.1088/1757-899x/1042/1/012004
Subject(s) - vhdl , field programmable gate array , computer science , coding (social sciences) , computer hardware , power consumption , interface (matter) , projection (relational algebra) , embedded system , power (physics) , algorithm , parallel computing , mathematics , statistics , physics , bubble , quantum mechanics , maximum bubble pressure method
In this paper, dimensional coding of projection has been developed with the hardware design for RS algorithms. The result of simulation of Memory Interface Unit for basic and dimensional projection coding with scale and Implemented Video Interface module using VHDL and Target on to the FPGA implemented (XCV300-bg432-6). It provided operating speed of 732.5 MHz, power consumption of 1249 BEL and 128.3 mW in FPGA.