Open AccessDesign and Implementation of Dual-channel 100MSPS Data Acquisition Module
Author(s) -
Hong Yang,
Xuemei Li,
Yifan Wang,
Bin Xu
Publication year - 2022
Publication title -
journal of physics. conference series
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.21
H-Index - 85
eISSN - 1742-6596
pISSN - 1742-6588
DOI - 10.1088/1742-6596/2196/1/012027
Subject(s) - computer hardware , data acquisition , computer science , oscilloscope , channel (broadcasting) , serial port , serdes , field programmable gate array , sampling (signal processing) , signal (programming language) , data transmission , electronic engineering , serial communication , engineering , filter (signal processing) , telecommunications , detector , programming language , computer vision , operating system
Aiming at the problems of single channel acquisition mode of traditional oscilloscope recorder, insufficient acquisition flexibility, low acquisition frequency, transmission delay, etc., this paper proposes a design method of dual-channel signal acquisition module based on FPGA hardware platform. This design uses a high-sampling-rate ADC chip AD9268 as a dual-channel acquisition port to achieve 100MSPS sampling frequency acquisition, while simultaneously transmitting the converted digital signal through the SerDes serial port. In the FPGA implementation process, a channel conditioning module is added to adjust the gain and offset of the input data. The test results show that the system can realize synchronous sampling, processing, and transmission of the input analog signal, and the acquisition process is stable, and the collected signal has a high degree of restoration and no distortion.