Open AccessA clock synchronization method in power dispatching based on BeiDou navigation system
Author(s) -
Hongbo Lian,
Xingcai Wang,
Shuo Zhang
Publication year - 2021
Publication title -
journal of physics. conference series
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.21
H-Index - 85
eISSN - 1742-6596
pISSN - 1742-6588
DOI - 10.1088/1742-6596/2108/1/012092
Subject(s) - computer science , synchronization (alternating current) , self clocking signal , clock synchronization , clock domain crossing , digital clock manager , global positioning system , field programmable gate array , clock drift , real time computing , clock gating , cpu multiplier , signal (programming language) , synchronous circuit , clock signal , power (physics) , embedded system , telecommunications , jitter , channel (broadcasting) , physics , quantum mechanics , programming language
This paper introduces the problems of poor signal condition of a single time source in time synchronization or error in time source switching in the power system. It adopts the two-clock mode timing scheme of BeiDou 2 synchronous satellite and GPS synchronous satellite to ensure the stable output of the main clock within a certain accuracy. The system takes full advantage of the field programmable gate array (FPGA) hardware method, aligns the internal clock lock signal with the input second pulse phase, and proposes an improved method for the problem of large clock synchronization deviation based on the network, which proves the effectiveness and superiority of the system to accurately output the pulse and provide reliable time synchronization for the power dispatching system.