Open AccessTime Borrowing Flip-Flop architecture for error masking in near threshold voltage regime
Author(s) -
Abhinav Raj,
Diwakar Arora,
Aman Chaurasia,
S. Indu
Publication year - 2021
Publication title -
journal of physics. conference series
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.21
H-Index - 85
eISSN - 1742-6596
pISSN - 1742-6588
DOI - 10.1088/1742-6596/1917/1/012001
Subject(s) - resilience (materials science) , flip flop , computer science , frequency scaling , masking (illustration) , voltage , real time computing , soft error , electronic engineering , electrical engineering , telecommunications , engineering , art , enhanced data rates for gsm evolution , visual arts , physics , thermodynamics
This As dynamic delay variability increases with near-threshold voltage operation, wide timing margins need to be integrated in DVFS (Dynamic Voltage and Frequency Scaling) when deciding the frequency of operation to ensure reliable and error-free operation. Hence the maximum frequency (which is already low) in near-threshold operation is limited by these timing margins. Online methodologies for the resilience of temporal arrangement errors facilitate the recovery of temporal arrangement margins, increasing efficiency and/or energy consumption. This study presents a method for the resilience of online temporal arrangement errors that masks temporal arrangement errors by borrowing time from the phases of serial pipelines. Planned style, while not instruction replay or roll-back support, will recover temporal arrangement margins.