Open AccessReview on Radiation Hardness Assurance by Design, Process and NextGen Devices
Author(s) -
Ch. Sridhar Rao,
Ameet Chavan
Publication year - 2021
Publication title -
journal of physics. conference series
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.21
H-Index - 85
eISSN - 1742-6596
pISSN - 1742-6588
DOI - 10.1088/1742-6596/1916/1/012002
Subject(s) - radiation hardening , electronics , radiation , materials science , integrated circuit , electronic circuit , fabrication , engineering physics , electrical engineering , computer science , electronic engineering , optoelectronics , engineering , physics , optics , medicine , alternative medicine , pathology
Aggressive scaling, shrinking device size and exponential rise in device densityover the past two decades has contributed significantly in improving the power and performance metrics of Integrated Circuit (IC) technology. For specific applications like Space electronics, Implanted Biomedical, Sensor devices etc. drastic scaling has resulted in increasing the susceptibility of the nanoscale circuits to radiation effects. The objective of the paper is to provide an overview of the radiation hardening techniques at various levels of IC design and development, i.e. at Device Structure-Fabrication process (Radiation Hardening by Process) and Circuit and layout design (Radiation Hardening by Design), to mitigate the effects of radiation and improve reliability. The work also presents comparison of next generation device structure that utilize Carbon Nano Tubes (CNTs) and Semiconductor NanoWires (GAA-Si, GaAs, InN) against traditional MOSFET based device structures for operation under the radiation environment.