Open AccessA 15-bit, 5 MSPS SAR ADC with on-chip digital calibration
Author(s) -
Wenxin Yu,
Yunqiang Hao,
Dongbai Yi,
Jianxiong Xi,
Xiaowei Zhang,
Lenian He
Publication year - 2021
Publication title -
journal of physics. conference series
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.21
H-Index - 85
eISSN - 1742-6596
pISSN - 1742-6588
DOI - 10.1088/1742-6596/1914/1/012032
Subject(s) - comparator , successive approximation adc , offset (computer science) , calibration , computer science , capacitor , least significant bit , shaping , matlab , 12 bit , electronic engineering , chip , electrical engineering , mathematics , voltage , engineering , telecommunications , cmos , statistics , programming language , operating system
In this paper, a digital algorithm based on a 15-bit, 5 million samples per second (MSPS), high-speed successive approximation register (SAR) analog-to-digital converter (ADC) is presented. It features on comparator offset cancellation and capacitor mismatch calibration. The algorithm uses a 13-bit bypass array to measure the errors of both comparator and capacitors. During calibration, errors are read and put into the bypass array to compensate for the mismatches of the main array. Verified by MATLAB, the errors of the SAR ADC output can be corrected into 1 LSB with the help of calibration. The simulation results show that the proposed algorithm improves the precision of the SAR ADC significantly.