Open AccessDesign of ECG Front End Amplifier Based on CMOS OTA
Author(s) -
Zekun Zhang,
Fandan Meng,
Luyuan Fan
Publication year - 2021
Publication title -
journal of physics. conference series
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.21
H-Index - 85
eISSN - 1742-6596
pISSN - 1742-6588
DOI - 10.1088/1742-6596/1907/1/012002
Subject(s) - instrumentation amplifier , common mode rejection ratio , electrical engineering , electronic engineering , amplifier , cmos , low noise amplifier , resistor , engineering , operational amplifier , computer science , voltage
The low-noise and low-power amplifier, an important part of ECG recordings, remains a vital challenge in the biomedical instrumentation amplifier field. This paper describe a method of using the capacitive feedback structure and the MOS-bipolar pseudo-resistor to reject the DC offset and amplify signals down to the milli-hertz range. This study used the noise efficiency factor (NEF) to quantify the tradeoff between power and noise. Fabricated in a 180 nm CMOS process, the amplifier consumes 1.44 µW, and achieves the input referred noise of 3.89 µVrms The calculated NEF is 18.07, while the corresponding to common-mode rejection ratio (CMRR) is 87.72 dB. The device achieves low-noise, low-power and appropriate CMRR, which provides a reference for the design of biomedical instrumentation amplifier.