Open AccessA design scheme for harmonic suppression network of high efficiency class-F power amplifier
Author(s) -
Chengxin Liu,
Xiaolong Chen
Publication year - 2021
Publication title -
journal of physics. conference series
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.21
H-Index - 85
eISSN - 1742-6596
pISSN - 1742-6588
DOI - 10.1088/1742-6596/1885/5/052061
Subject(s) - amplifier , harmonic , scheme (mathematics) , electronic engineering , power (physics) , microstrip , capacitance , ultra high frequency , computer science , class (philosophy) , topology (electrical circuits) , electrical engineering , engineering , mathematics , physics , acoustics , mathematical analysis , cmos , electrode , quantum mechanics , artificial intelligence
This paper presents a design scheme of class-F PA harmonic suppression network. This scheme combines the advantages of lumped parameter elements and distributed parameter elements, and makes use of the characteristics of high Q value (quality factor), large adjustability of capacitance and high reusability of the microstrip line, so that the harmonic suppression network has the advantages of them. Based on the proposed scheme, a class-F PA with a frequency of 2.4GHz and a maximum PAE of 68.86% is designed, the output power of which can reach 17.5W (42.42dBm), so as to verify the feasibility of the proposed scheme. This scheme can improve the output power of UHF (300 ~ 3000MHz) class-F PA and reduce the difficulty of circuit design under the condition of high PAE.