
Research Analysis of PCB Design’s Influence on DDR4 Highspeed Signal Integrity
Author(s) -
Fang Li
Publication year - 2021
Publication title -
journal of physics. conference series
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.21
H-Index - 85
eISSN - 1742-6596
pISSN - 1742-6588
DOI - 10.1088/1742-6596/1873/1/012021
Subject(s) - signal integrity , signal (programming language) , electronic engineering , printed circuit board , transmission line , transmission (telecommunications) , computer science , electrical impedance , power integrity , interference (communication) , engineering , electrical engineering , channel (broadcasting) , programming language
With the increase of the signal transmission rate of electronic devices and the increase of the PCB wiring density, PCB design has a growing influence on signal integrity. To reduce the number of the problems concerning signal integrity at the initial stage of electronic product design and increase the success rate of the designing of electronic products, some interference signals of PCB are canceled to improve the accuracy of signal integrity test, with the high-speed parallel bus of DDR4 as an example. Analysis is done through measurement of various simulation tools to change the PCB design parameters of DDR4 data transmission line, hence the optimum wiring method will influence the signal quality. Meanwhile, RC parallel impedance matching optimization is carried out to deal with the impedance mismatch at the network load end. In this way, the problem concerning DDR4 high-speed signal integrity is effectively solved.