Open AccessExperimental Verification of Single-Stage Power Factor Correction Converter with Improved Light-Load Efficiency
Author(s) -
Yashwanth Thangisetty,
P. Balamurugan,
Nitin Kumar
Publication year - 2020
Publication title -
journal of physics. conference series
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.21
H-Index - 85
eISSN - 1742-6596
pISSN - 1742-6588
DOI - 10.1088/1742-6596/1716/1/012002
Subject(s) - power factor , buck converter , topology (electrical circuits) , converters , power (physics) , switched mode power supply , computer science , electronic engineering , harmonic , matlab , power mosfet , voltage , control theory (sociology) , transistor , electrical engineering , engineering , mosfet , physics , control (management) , quantum mechanics , artificial intelligence , operating system
Single-stage single-switch ac/dc converters with power factor correction will have higher power losses under a light-load condition, as compared to that of two-stage approach, due to sharing of a common power transistor such that the power factor correction (PFC) stage cannot be switched OFF separately to save power losses. This paper addresses the problem by using a buck topology for the PFC stage of single-stage single-switch converters as it can completely turned OFF. This converter topology is capable of working in both buck mode and buck-boost mode depending on the rectified voltage at input side and power at load side. A simple and effective topology incorporating PFC for low power applications is simulated in Matlab/Simulink environment. Hardware implementation of the converter was and performance was verified with various practical light loads. It also satisfies the harmonic compliance of source current in accordance to the IEEE519:1992 recommendations. The control is very simple and gives good performance.