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Simulation of the Thermal Performance of HTS Coated Conductors for HVDC SFCL
Author(s) -
Wescley Tiago Batista de Sousa,
A. Kudymow,
Severin Strauß,
Szymon Palasz,
S. Elschner,
M. Noë
Publication year - 2020
Publication title -
journal of physics. conference series
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.21
H-Index - 85
eISSN - 1742-6596
pISSN - 1742-6588
DOI - 10.1088/1742-6596/1559/1/012097
Subject(s) - overheating (electricity) , conductor , electrical conductor , materials science , limiter , resistive touchscreen , superconductivity , voltage , thermal , electrical engineering , critical current , fault current limiter , optoelectronics , engineering physics , nuclear engineering , composite material , condensed matter physics , engineering , electric power system , physics , power (physics) , quantum mechanics , meteorology
Within the EU-funded project FastGrid a resistive superconducting fault current limiter for DC-application is actually under development. To reduce substantially the amount of deployed superconducting tape an increase of voltage per length in the limitation case is needed. Moreover, the resistive transition (quench) should be fast and uniform. In the present work, the thermal behavior of three different architectures of coated conductors are investigated by means of transient simulations. The first architecture is composed by an additional Hastelloy shunt layer, which is supposed to avoid overheating of the conductor during fault limitation. The other architectures include layers of silver and copper as stabilizers. Our parameter study including the geometries of the different layers and the inhomogeneity of the critical current density of the superconducting tape shall lead to an optimized tape layout. First comparisons with experiment indicate, that, with the first architecture, electric field strength up to 100 V/m should be within reach.

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