Open AccessDesign of high-resolution digital-to-analog converter for 14-bit successive approximation analog-to-digital converter
Author(s) -
Muhammad Syafiee Kamaruzaman,
Nabihah Ahmad,
Siti Hawa Ruslan,
Hasmayadi Abdul Majid,
C. Y. Chia,
Nur Zazmera Mustafa Kamal,
Matthew Khoo Kah Wen
Publication year - 2020
Publication title -
journal of physics. conference series
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.21
H-Index - 85
eISSN - 1742-6596
pISSN - 1742-6588
DOI - 10.1088/1742-6596/1529/5/052101
Subject(s) - successive approximation adc , digital to analog converter , least significant bit , capacitor , cmos , integral nonlinearity , electronic engineering , analog to digital converter , block (permutation group theory) , computer science , 12 bit , voltage , converters , electrical engineering , engineering , mathematics , geometry , operating system
Digital to Analog Converter (DAC) is the essential block to convert an input digital signal into analog signal. The switching technique is the important parameter that will affect the performance of DAC where to ensure the analog output signal can be obtained without any missing code. The capacitor DAC is most famous architecture used to design the DAC and it produce high power efficiency. But, the number of unit capacitors in DAC increase exponentially due to the increasing of resolution and a DAC block occupies a largest area among many internal blocks in Successive Approximation Register (SAR) Analog to Digital Converter (ADC). The DAC was designed for 14-bit SAr ADC using a hybrid Rc DAC architecture. The design of DAC has been carried out by using 0.18μm CMOS Silterra process Technology. The simulation results are done with 3.3V voltage supply and obtained DNL within -0.39 LSB to 0.238 LSB. It occupies an area of 0.614μm 2 .