Open AccessVMM3a, an ASIC for tracking detectors
Author(s) -
G. Iakovidis
Publication year - 2020
Publication title -
journal of physics. conference series
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.21
H-Index - 85
eISSN - 1742-6596
pISSN - 1742-6588
DOI - 10.1088/1742-6596/1498/1/012051
Subject(s) - application specific integrated circuit , micromegas detector , large hadron collider , upgrade , detector , physics , field programmable gate array , nuclear electronics , chip , amplifier , electrical engineering , cmos , computer hardware , computer science , engineering , optoelectronics , nuclear physics , operating system
The VMM3a is a System on Chip (SoC) custom Application Specific Integrated Circuit (ASIC) 1 . It is the production version which will be used as the front ASIC for both Micromegas and sTGC detectors of the ATLAS Muon New Small Wheels upgrade at CERN. Due to its highly configurable parameters it has been proposed for several tracking detectors and other experiments. It is fabricated in the 130 nm Global Foundries 8RF-DM process. The ASIC integrates 64 channels, each providing charge amplification, discrimination, neighbour logic, amplitude and timing measurements, analog-to-digital conversions, and either direct output for trigger or multiplexed readout within a data-driven readout system. The front-end amplifier can operate with a wide range of input capacitances, has adjustable polarity, gain and peaking time. The ASIC has been tested on resistive Micromegas and sTGC prototypes in test beam campaigns at CERN.