Open AccessThe Effect of Source and Drain Pocketing on the Performance of Double-Gate Tunnelling Field-Effect Transistor
Author(s) -
Muhammad Elgamal
Publication year - 2020
Publication title -
journal of physics. conference series
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.21
H-Index - 85
eISSN - 1742-6596
pISSN - 1742-6588
DOI - 10.1088/1742-6596/1447/1/012020
Subject(s) - quantum tunnelling , ambipolar diffusion , subthreshold swing , dielectric , materials science , transistor , optoelectronics , gate dielectric , enhanced data rates for gsm evolution , double gate , field effect transistor , high κ dielectric , electrical engineering , mosfet , physics , engineering , plasma , voltage , telecommunications , quantum mechanics
In this paper the digital and analogue performance of double-gate tunnelling FET, DGTFET, is reported, when a pocket of different dielectric is inserted near the source, drain or both. The variation of these pocket lengths and their relative shift to the edge of source or drain region affects device performance. The investigated performance parameters include the ON/OFF ratio, the maximum cut-off frequency, f T , the subthreshold swing, SS, and the ambipolar current, I ambi . With the aid of TCAD simulator, the effect of pocket parameter variation is studied. Our study shows that when the main gate dielectric is hafnium dioxide, the source pocket is favored to be of low dielectric constant and high width. However, for the drain case, it is better to have shorter pockets with a low dielectric constant. The investigation shown here proves that pocketing the DGTFET can enhance its whole performance in terms of investigated parameters.