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THD analysis for symmetrical five level and seven level cascaded multilevel inverter
Author(s) -
Fahimah Kaja Mohideen,
Nor Ashbahani Mohamad Kajaan,
Zainuddin Mat Isa,
Norkharziana Mohd Nayan,
Mohd Hafiz Arshad,
Saidatul Shema Saad
Publication year - 2020
Publication title -
journal of physics. conference series
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.21
H-Index - 85
eISSN - 1742-6596
pISSN - 1742-6588
DOI - 10.1088/1742-6596/1432/1/012020
Subject(s) - total harmonic distortion , inverter , waveform , topology (electrical circuits) , h bridge , control theory (sociology) , grid tie inverter , network topology , mosfet , electronic engineering , computer science , voltage , engineering , transistor , control (management) , electrical engineering , maximum power point tracking , artificial intelligence , operating system
Total Harmonic Distortion (THD) is one of the problems in the multilevel inverter. This paper discussed a brief review of THD in different cascaded H-bridge multilevel inverter topologies of five levels and seven levels at the output waveforms. The five levels inverter contains eight switches while seven levels inverter used twelve switches. Each single H-bridge inverter circuit is fed by equally independent DC source for both inverters. The inverter uses MOSFET as the switching point and acts as the controller for a fundamental switching operation. The switching value has been set at the gating block to control the operation of the MOSFET switching. Several waveforms and simulation findings are provided to validate the quality of the proposed topology.

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