Open AccessDevelopment and Optimization Design of Digital Logic device based on FPGA
Author(s) -
Heng Wang,
Xinrui Chen
Publication year - 2019
Publication title -
journal of physics. conference series
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.21
H-Index - 85
eISSN - 1742-6596
pISSN - 1742-6588
DOI - 10.1088/1742-6596/1345/6/062051
Subject(s) - complex programmable logic device , field programmable gate array , programmable array logic , programmable logic device , erasable programmable logic device , simple programmable logic device , macrocell array , programmable logic array , computer science , computer hardware , fpga prototype , logic synthesis , function (biology) , embedded system , digital electronics , interconnection , logic gate , logic family , engineering , electrical engineering , electronic circuit , telecommunications , algorithm , evolutionary biology , biology
FPGA is the abbreviation of Field Programmable Gate Array. The corresponding CPLD is the abbreviation of complex Programmable Logic device. So sometimes the difference can be ignored, collectively called programmable logic devices or CPLD/PGFA. FPGA has a universal structure of masked programmable gate arrays, which is arranged by logical function blocks and connected by programmable interconnection resources to implement different designs. The basic function of a digital electronic clock based on FPGA is designed, simulated and realized by using digital electronic technology, such as FPGA and so on.