
Algorithm Research and Hardware Implementation of High Precision Floating Point Exponential Function
Author(s) -
Xiafeng Zou,
Mingjiang Wang
Publication year - 2019
Publication title -
journal of physics. conference series
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.21
H-Index - 85
eISSN - 1742-6596
pISSN - 1742-6588
DOI - 10.1088/1742-6596/1345/4/042085
Subject(s) - exponential function , floating point , computer science , cordic , python (programming language) , field programmable gate array , range (aeronautics) , fixed point arithmetic , function (biology) , computer hardware , double precision floating point format , algorithm , mathematics , engineering , mathematical analysis , aerospace engineering , operating system , evolutionary biology , biology
Exponential function is of great significance for high-precision calculation in computer technology. The study of exponential function plays a very important role in modern communication and signal processing. With the rapid increase of the number of digits in computer computing, the fixed-point representation range is small and limited in practical applications. The floating-point number indicates a wide range of teaching and has a wider range of applications. Therefore, the research direction of this article is the hardware algorithm research and implementation of high-precision floating-point exponential function. The goal is to implement the 64-bit high-precision exponential function hardware implementation in accordance with IEEE754 standard. In this paper, the vector mode in the CORDIC algorithm is used to improve the efficiency of the algorithm by improving the iterative method. The 64-bit floating-point exponential function operation is realized by FPGA, and the accuracy is achieved when compared with the PYTHON operation result.