Open AccessA high linearity high speed time-interleaved track and hold circuit
Author(s) -
Miao Huo,
Zongmin Wang,
Tieliang Zhang,
Song Yang
Publication year - 2019
Publication title -
journal of physics. conference series
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.21
H-Index - 85
eISSN - 1742-6596
pISSN - 1742-6588
DOI - 10.1088/1742-6596/1311/1/012045
Subject(s) - linearity , feedthrough , electronic engineering , computer science , amplifier , cmos , boosting (machine learning) , engineering , electrical engineering , machine learning
This paper presents a high linearity 4GS/s 4-way time-interleaved track and hold circuit in 65nm CMOS process. A high linearity track and hold amplifier is designed for each single channel, which utilizes open-loop structure instead of traditional closed-loop structure used in low speed applications. In the presented design, we introduced clock-boosting switches and buffers applying source degeneration technique to enable the high linearity. Meanwhile signal feedthrough is cancelled by dummy switches. The proposed design finally achieves over 52 dB signal to noise and distortion ratio (SNDR) for a 400 mV input Vpp at 4GS/s sampling rate.