Open AccessInitial investigations into the MOS interface of freestanding 3C-SiC layers for device applications
Author(s) -
Arne Benjamin Renz,
F. Li,
Oliver J. Vavasour,
P. M. Gammon,
Tianxiang Dai,
Guy Baker,
F. La Via,
Marcin Zieliński,
L. Zhang,
Nicholas E. Grant,
John D. Murphy,
P.A. Mawby,
Mike Jennings,
V. A. Shah
Publication year - 2021
Publication title -
semiconductor science and technology
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.712
H-Index - 112
eISSN - 1361-6641
pISSN - 0268-1242
DOI - 10.1088/1361-6641/abefa1
Subject(s) - epitaxy , materials science , surface finish , diffraction , surface roughness , optoelectronics , atomic force microscopy , composite material , nanotechnology , optics , layer (electronics) , physics
This letter reports on initial investigation results on the material quality and device suitability of a homo-epitaxial 3C-SiC growth process. Atomic force microscopy surface investigations revealed root-mean square surface roughness levels of 163.21 nm, which was shown to be caused by pits (35 μ m width and 450 nm depth) with a density of 1.09 × 10 5 cm −2 which had formed during material growth. On wider scan areas, the formation of these were seen to be caused by step bunching, revealing the need for further epitaxial process improvement. X-ray diffraction showed good average crystalline qualities with a full width of half-maximum of 160 arcseconds for the 3C-SiC (002) being lower than for the 3C-on-Si material (210 arcseconds). The analysis of C – V curves then revealed similar interface-trapped charge levels for freestanding 3C-SiC, 3C-SiC on Si and 4H-SiC, with forming gas post-deposition annealed freestanding 3C-SiC devices showing D IT levels of 3.3 × 10 11 cm −2 eV −1 at E C − E T = 0.2 eV. The homo-epitaxially grown 3C-SiC material’s suitability for MOS applications could also be confirmed by leakage current measurements.