Open AccessIII–V nanowire MOSFETs with novel self-limiting Λ-ridge spacers for RF applications
Author(s) -
Fredrik Lindelöw,
Navya Sri Garigapati,
Lasse Södergren,
Bertil Borg,
Erik Lind
Publication year - 2020
Publication title -
semiconductor science and technology
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.712
H-Index - 112
eISSN - 1361-6641
pISSN - 0268-1242
DOI - 10.1088/1361-6641/ab8398
Subject(s) - nanowire , ridge , scaling , microwave , materials science , field effect transistor , transistor , conductance , optoelectronics , limiting , semiconductor , voltage , nanotechnology , condensed matter physics , electrical engineering , physics , engineering , geometry , mathematics , quantum mechanics , mechanical engineering , paleontology , biology
We present a semi self-aligned processing scheme for III–V nanowire transistors with novel semiconductor spacers in the shape of Λ-ridges, utilising the effect of slow growth rate on {111}B facets. The addition of spacers relaxes the constraint on the perfect alignment of gate to contact areas to enable low overlap capacitances. The spacers give a field-plate effect that also helps reduce off-state and output conductance while increasing breakdown voltage. Microwave compatible devices with L g = 32 nm showing f T = 75 GHz and f max = 100 GHz are realized with the process, demonstrating matched performance to spacer-less devices but with relaxed scaling requirements.