Open AccessResearch on balance control strategy of single capacitor clamped five‐level inverter clamping capacitor
Author(s) -
Ye Manyuan,
Wei Qiwen,
Li Song,
Ren Wei,
Song Guizhi
Publication year - 2021
Publication title -
iet power electronics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.637
H-Index - 77
eISSN - 1755-4543
pISSN - 1755-4535
DOI - 10.1049/pel2.12032
Subject(s) - clamping , capacitor , inverter , decoupling capacitor , control theory (sociology) , correctness , topology (electrical circuits) , control (management) , voltage , modulation (music) , engineering , computer science , electronic engineering , electrical engineering , physics , mechanical engineering , programming language , artificial intelligence , acoustics
A five‐level inverter composed of a single capacitor clamped three‐level topology and a half‐bridge is introduced, and a new SPWM control strategy for this topology is proposed. The strategy uses two modulation waves with opposite directions to modulate the positive and negative half‐cycle interleaved carriers. By controlling the charging and discharging times of the clamping capacitor in each carrier cycle, the voltage balance control of the clamping capacitor is achieved. At the same time, a single‐phase capacitor clamped five‐level inverter is taken as an example to analyse the principle of the capacitor balance control strategy in detail, and to verify the correctness and feasibility of the control strategy through simulation research and experimental results.