
A new boost switched capacitor seven‐level grid‐tied inverter
Author(s) -
Gao Yang,
Zhang Weichi,
Naderi Zarnaghi Yahya,
Vosoughi Kurdkandi Naser,
Zhang Chenming
Publication year - 2021
Publication title -
iet power electronics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.637
H-Index - 77
eISSN - 1755-4543
pISSN - 1755-4535
DOI - 10.1049/pel2.12031
Subject(s) - capacitor , switched capacitor , topology (electrical circuits) , inverter , waveform , voltage , power (physics) , grid tie inverter , computer science , photovoltaic system , electrical engineering , electronic engineering , engineering , maximum power point tracking , physics , quantum mechanics
In this paper, a new switched capacitor‐based multilevel inverter structure is suggested. The proposed topology can generate seven‐level output voltage waveform using ten power electronic switches and two floating capacitors. This structure has the ability to boost the input DC voltage, up to 1.5 times. Although this topology can generate an output waveform with large number of levels, it does not increase the voltage stress on the power electronic switches. There is no need for capacitor voltage balancing in this structure since the capacitors are balanced through charging and discharging modes of operation. In addition, the suggested switched capacitor inverter reduces the number of input dc power supplies and uses a single dc source such as a photovoltaic (PV) panel. Since the proposed inverter is an neutral point clamp based multilevel inverter topology, the leakage current is minimized and as a result the overall efficiency of the proposed system is increased. The operation modes and steady‐state analysis of the proposed structure are explained in detail. In order to validate the feasibility of the proposed topology, some experimental results are presented in the grid connected mode of operation.