
Analysis of kink reduction and reliability issues in low‐voltage DTD‐based SOI TFET
Author(s) -
Ghosh Puja,
Bhowmick Brinda
Publication year - 2020
Publication title -
micro and nano letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.25
H-Index - 31
ISSN - 1750-0443
DOI - 10.1049/mnl.2019.0427
Subject(s) - silicon on insulator , materials science , optoelectronics , diode , trench , reliability (semiconductor) , transistor , doping , voltage , silicon , electrical engineering , physics , nanotechnology , engineering , power (physics) , quantum mechanics , layer (electronics)
This work proposes a silicon‐on‐insulator (SOI) tunnel field‐effect transistor (TFET) with highly doped p ++ ‐type L‐shaped trench, which creates two dual tunnel diodes (DTDs) and compares the results with conventional SOI (C‐SOI) TFET structure. Kink effect is analysed in SOI TFET, and for eliminating kink effect, a method has been proposed. The tunnel current of the DTD eliminates the accumulation of holes and mitigates the kink effect. The impact of temperature variation on kink effect has been studied. In the case of C‐SOI device, kink effect postpones with the rise in temperature and the DTD‐SOI device provides improved performance even at high temperature with no kink in the current–voltage characteristics. Moreover, the reliability issues of DTD‐SOI device have been examined by considering various noise components in the presence of interface traps.