Open AccessSplit‐gate LDMOS with double vertical field plates
Author(s) -
Wu Lijuan,
Yuan Na,
Lei Bing,
Zhang Yinyan,
Song Yue
Publication year - 2018
Publication title -
micro and nano letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.25
H-Index - 31
ISSN - 1750-0443
DOI - 10.1049/mnl.2018.5162
Subject(s) - ldmos , materials science , electric field , figure of merit , optoelectronics , transistor , breakdown voltage , voltage , field effect transistor , electrical engineering , mosfet , gate oxide , engineering , physics , quantum mechanics
In this study, a novel split‐gate lateral double‐diffused metal oxide semiconductor field effect transistor with double vertical field plates (SG DVFP LDMOS) is proposed. The first feature of the SG DVFP LDMOS is that the SG with gradient gate oxide is introduced. The SG not only optimises the bulk electric field distributions to increase the breakdown voltage (BV) but also reduces the gate‐drain charge ( Q GD ) owing to the thick gate oxide. The second feature of the SG DVFP LDMOS is the presence of the DVFP and P‐pillar. They modulate the bulk electric field distributions and assist to deplete the drift region. So the specific on‐resistance ( R on,sp ) is decreased and the BV is improved. The source vertical field plate reduces the contact region between the gate and drain, thereby the Q GD is reduced. Compared with the conventional SG LDMOS and rectangle‐gate DVFP LDMOS, the figure of merit FOM1 of SG DVFP LDMOS is increased by 123.2 and 86.6%, and the loss figure of merit FOM2 is enhanced to 16.9 and 37.2%. Simultaneously, the key process steps of the SG DVFP LDMOS are proposed.