Open AccessImprovement of short channel performance of junction‐free charge trapping 3D NAND flash memory
Author(s) -
Gupta Deepika,
Vishvakarma Santosh K.
Publication year - 2017
Publication title -
micro and nano letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.25
H-Index - 31
ISSN - 1750-0443
DOI - 10.1049/mnl.2016.0641
Subject(s) - nand gate , flash (photography) , materials science , optoelectronics , channel (broadcasting) , flash memory , trapping , threshold voltage , short channel effect , doping , electrical engineering , computer science , voltage , transistor , computer hardware , physics , mosfet , optics , engineering , ecology , biology
This work investigates the effect of channel engineering on the short channel performance of considered sub‐20‐nm 3D NAND flash memory. Here, the threshold voltage roll‐off (Δ V th ), subthreshold swing and drain induced barrier lowering metrics is studied to evaluate the short channel effects (SCEs) for the examined device. The effect of variation in doping density on SCEs of proposed channel engineered NAND flash memory is also studied. Based on the observation, a thin layer of high doping concentration in the centre of the channel, covering 25% of channel area, has been found to improve the SCE of NAND flash memory compared with the device with uniform channel doping while maintaining sufficient drive current.