Open AccessDicing‐free SOI process based on wet release technology
Author(s) -
Hao Yongcun,
Xie Jianbing,
Yuan Weizheng,
Chang Honglong
Publication year - 2016
Publication title -
micro and nano letters
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.25
H-Index - 31
ISSN - 1750-0443
DOI - 10.1049/mnl.2016.0342
Subject(s) - wafer dicing , deep reactive ion etching , stiction , notching , materials science , silicon on insulator , wafer , bevel , microelectromechanical systems , fabrication , optoelectronics , etching (microfabrication) , layer (electronics) , silicon , nanotechnology , reactive ion etching , mechanical engineering , engineering , medicine , alternative medicine , pathology , metallurgy
A simple, low‐cost and reliable dicing‐free silicon‐on‐insulator (SOI) process is presented for solving three major challenges in manufacturing the microelectromechanical systems devices, i.e. stiction, notching and dicing damage. In this process, the cavity is used and patterned on the handle layer to solve the stiction problem, and the exposed oxide is removed in hydrofluoric acid (HF) solution before deep reactive ion etching (DRIE) on the structure layer to eliminate the notching effect's impact. The dies are attached temporally to a designed frame by the silicon dioxide. After removing the oxide using HF solution, the dies are separated from the wafer cleanly without dicing damage. The layout design rules on the front side and backside patterns are established. Furthermore, a grooved carrier wafer with specific design rules was introduced to enhance the yield rate of the process. Finally, a tuning fork gyroscope was fabricated to demonstrate the proposed fabrication process and a yield rate of over 81% was achieved. The process solves the stiction, notching and dicing damage problems only involving the apparatus associated with lithography and DRIE, offering an economic and complete SOI process solution.