Open AccessLeNet‐5 improvement based on FPGA acceleration
Author(s) -
Hou Yong,
Chen Zhang Bao
Publication year - 2020
Publication title -
the journal of engineering
Language(s) - English
Resource type - Journals
ISSN - 2051-3305
DOI - 10.1049/joe.2019.1190
Subject(s) - computer science , inefficiency , field programmable gate array , deep learning , artificial intelligence , acceleration , hardware acceleration , machine learning , embedded system , physics , classical mechanics , economics , microeconomics
Deep learning is a branch of traditional machine learning. Thanks to the leap in computer hardware computing power in recent years, deep learning has become one of the hot topics. In view of the inefficiency of the traditional LeNet‐5, here, LeNet‐5 is improved by using the FPGA to accelerate the LeNet‐5. Finally, by training the handwritten digit recognition model experiment, it is verified that the improved LeNet‐5 model has a great improvement in terms of efficiency and accuracy.