Open AccessPower cable stresses caused by transmission line faults in next generation VSC‐MMC systems
Author(s) -
Tünnerhoff Philipp,
Ruffing Philipp,
Puffer Ralf
Publication year - 2019
Publication title -
the journal of engineering
Language(s) - English
Resource type - Journals
ISSN - 2051-3305
DOI - 10.1049/joe.2018.8628
Subject(s) - emtp , overhead (engineering) , transient (computer programming) , converters , electric power transmission , engineering , fault (geology) , voltage source , overhead line , transmission system , modular design , electric power system , high voltage direct current , transmission line , electrical engineering , voltage , high voltage , electronic engineering , computer science , power (physics) , transmission (telecommunications) , direct current , physics , quantum mechanics , seismology , geology , operating system
Until today, HVDC systems based on Modular Multilevel Voltage Source Converters (VSC‐MMC) have exclusively been realised with cross‐linked polyethylene (XLPE) cable transmission in monopolar configuration. The next generation of VSC‐MMC systems may comprise bipolar configurations, mixed cable and overhead line transmission or hybrid AC/DC corridors. While diverse and more complex fault characteristics are expected in these systems, suitable XLPE cable test standards addressing these impacts are not yet available. Within this work, the dynamic fault behaviour of next generation VSC‐MMC systems is analysed to evaluate voltage and current stresses imposed on future cable applications. For this purpose, several system topologies and MMC setups are modelled and extensive fault simulation studies are carried out in an electromagnetic transient program (EMTP). As the results indicate, future cable applications may be exposed to severe transient stresses exceeding existing test levels. In particular, travelling wave reflections at the transitions of cable and overhead line segments may cause high‐frequency voltage oscillations with amplitudes of up to −2 pu. Moreover, intersystem faults in hybrid AC/DC corridors may lead to superimposed AC and DC cable stresses. The identified fault characteristics need to be taken into consideration to develop suitable cable test standards for future HVDC systems.