Open AccessSynchronisation of a distributed control and data acquisition system for modular multi‐level PHIL amplifiers
Author(s) -
Sands Kenneth D.,
Broadmeadow Mark A. H.,
Walker Geoffrey R.
Publication year - 2019
Publication title -
the journal of engineering
Language(s) - English
Resource type - Journals
ISSN - 2051-3305
DOI - 10.1049/joe.2018.8036
Subject(s) - pulse width modulation , modular design , electronic engineering , computer science , amplifier , modulation (music) , data acquisition , test bench , engineering , computer hardware , electrical engineering , embedded system , voltage , operating system , philosophy , cmos , aesthetics
This research presents a novel technique to synchronise a modular control and data acquisition system for the testing of multi‐level power hardware‐in‐the‐loop (PHIL) amplifiers. The methodology is inspired by the precision timing protocol, used to compensate for communications latency between distributed control nodes. It uses a non‐conventional digital pulse‐width modulation (PWM) technique, phase accumulator carrier pulse‐width modulation to achieve carrier synchronisation across the system. A prototype design has been demonstrated on a three‐node test bench, showing single clock cycle (10 ns) precision when synchronising a 25 kHz PWM carrier wave, with minimal sensitivity to communications link propagation delays.