Open AccessTOV in SMs during MMC riding through zero DC voltage fault: analysis and suppression
Author(s) -
Hu Jiabing,
Lu Maozeng,
Lin Lei
Publication year - 2016
Publication title -
the journal of engineering
Language(s) - English
Resource type - Journals
ISSN - 2051-3305
DOI - 10.1049/joe.2016.0194
Subject(s) - zero (linguistics) , fault (geology) , voltage , computer science , control theory (sociology) , electrical engineering , engineering , geology , artificial intelligence , seismology , philosophy , control (management) , linguistics
A comprehensive analysis and a suppression method of sub‐modules’ (SMs ’ ) transient over‐voltage (TOV) in a hybrid modular multilevel converter are presented, consisting of half half‐bridge SMs and half full‐bridge SMs, during riding through zero DC voltage faults. Analytical expressions of SMs’ TOV are initially explored. The relations among transient voltages of SMs in six arms with the same fault moment and those in a fixed arm with different fault moments are deduced. Furthermore, the maximum value of SMs’ transient voltages dependent on the fault moment is also presented. A suppression method using common‐mode voltage injection is proposed without sacrificing the performance of the converter on riding through zero DC voltage faults. Simulated results are provided to demonstrate the validity of the analytical results and the feasibility of the proposed suppression scheme.