Open AccessImplementation of high‐speed–low‐power adaptive finite impulse response filter with novel architecture
Author(s) -
Jaiswal Manish,
Sharma Sandeep,
Sharma Anuj
Publication year - 2015
Publication title -
the journal of engineering
Language(s) - English
Resource type - Journals
ISSN - 2051-3305
DOI - 10.1049/joe.2014.0198
Subject(s) - cmos , finite impulse response , computer science , field programmable gate array , adaptive filter , filter (signal processing) , least mean squares filter , matlab , critical path method , impulse (physics) , architecture , electronic engineering , control theory (sociology) , computer hardware , algorithm , physics , engineering , artificial intelligence , art , control (management) , systems engineering , quantum mechanics , visual arts , computer vision , operating system
An energy efficient high‐speed adaptive finite impulse response filter with novel architecture is developed. Synthesis results along with novel architecture on different complementary metal–oxide semiconductor (CMOS) families are presented. Analysis is performed using Artix‐7, Spartan‐6 and Virtex‐4 for most popular adaptive least mean square filter for different orders such as N = 8, 16, 32. The presented work is done using MATLAB (2013b) and Xilinx (14.2). From the synthesis results, it can be found that CMOS (28 nm) achieves the lowest power and critical path delay compared to others, and thus proves its efficiency in terms of energy. Different parameters are considered such as look up tables and input–output blocks, along with their optimised results.