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A 65 nm CMOS broadband self‐calibrated power detector for the square kilometre array radio telescope
Author(s) -
Wu Ge,
Belostotski Leonid,
Haslett James W.
Publication year - 2014
Publication title -
the journal of engineering
Language(s) - English
Resource type - Journals
ISSN - 2051-3305
DOI - 10.1049/joe.2014.0164
Subject(s) - detector , cmos , physics , calibration , sensitivity (control systems) , voltage , broadband , electronic circuit , electrical engineering , optics , optoelectronics , electronic engineering , engineering , quantum mechanics
In this study, a 65 nm complementary metal oxide semiconductor (CMOS) broadband self‐calibrated high‐sensitivity power detector for use in the Square Kilometre Array (SKA), the next‐generation high‐sensitivity radio telescope, is presented. The power detector calibration is performed by adjusting voltages at the bulk terminals of the input transistors to compensate for mismatches in the output voltages because of process, voltage and temperature variations. Measurements show that the power detector, preceded by an input power‐match circuit with 6 dB gain, has an input signal range from −48 to −11 dBm over which a 0.95 dB maximum error in the detected power is observed when the calibration rate is 20 kHz. The proposed broadband power detector has a 3 dB upper band edge of 1.8 GHz, which adequately covers the midband SKA frequency range from 0.7 to 1.4 GHz. The settling time and the calibration time are both <5 μs. The circuit consumes 1.2 mW from a 1.2 V power supply and the input‐match circuit consumes another 5.8 mW. The presented power detector achieves the best combination of the detection range and sensitivity of previously published circuits.

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