Open AccessLow‐power adiabatic 9T static random access memory
Author(s) -
Takahashi Yasuhiro,
Nayan Nazrul Anuar,
Sekine Toshikazu,
Yokoyama Michio
Publication year - 2014
Publication title -
the journal of engineering
Language(s) - English
Resource type - Journals
ISSN - 2051-3305
DOI - 10.1049/joe.2014.0009
Subject(s) - nmos logic , static random access memory , adiabatic process , dissipation , transistor , electronic engineering , resistor , materials science , electrical engineering , optoelectronics , physics , engineering , voltage , quantum mechanics
In this paper, the authors propose a novel static random access memory (SRAM) that employs the adiabatic logic principle. To reduce energy dissipation, the proposed adiabatic SRAM is driven by two trapezoidal‐wave pulses. The cell structure of the proposed SRAM has two high‐value resistors based on a p‐type metal‐oxide semiconductor transistor, a cross‐coupled n‐type metal‐oxide semiconductor (NMOS) pair and an NMOS switch to reduce the short‐circuit current. The inclusion of a transmission‐gate controlled by a write word line signal allows the proposed circuit to operate as an adiabatic SRAM during data writing. Simulation results show that the energy dissipation of the proposed SRAM is lower than that of a conventional adiabatic SRAM.