
Digital model of TiO 2 memristor for field‐programmable gate array
Author(s) -
Wang Guangyi,
Bai Dandan,
Wang Xiaoyuan
Publication year - 2014
Publication title -
the journal of engineering
Language(s) - English
Resource type - Journals
ISSN - 2051-3305
DOI - 10.1049/joe.2013.0183
Subject(s) - memristor , gate array , field programmable gate array , digital signal processing , computer science , memistor , digital electronics , block (permutation group theory) , field (mathematics) , computer hardware , electronic engineering , electronic circuit , electrical engineering , resistive random access memory , engineering , mathematics , voltage , geometry , pure mathematics
A digital model which imitates the behaviour of a TiO 2 memristor as a new block in Alter DSP Builder is proposed in this Letter. The proposed model can be used as an independent memristor unit working with other units for designing memristor circuits based on field‐programmable gate array. The accuracy of the digital model is confirmed not only by simulations, but also by hardwire experiments.