
Assessment of DC offset in fault current signal for accurate phasor estimation considering current transformer response
Author(s) -
Achlerkar Pankaj D.,
Panigrahi Bijaya Ketan
Publication year - 2019
Publication title -
iet science, measurement and technology
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.418
H-Index - 49
eISSN - 1751-8830
pISSN - 1751-8822
DOI - 10.1049/iet-smt.2018.5172
Subject(s) - phasor , dc bias , current transformer , offset (computer science) , matlab , electronic engineering , computer science , transformer , control theory (sociology) , engineering , electric power system , electrical engineering , voltage , physics , power (physics) , quantum mechanics , programming language , operating system , control (management) , artificial intelligence
This study demonstrates the accurate signal model to be used for fault generated instantaneous current signals containing decaying DC offset by considering initial loading conditions and response of obvious non‐ideal current transformer (CT). The issue of CT core saturation and its impact on signal is evaluated. The comparative performance of existing DC offset estimation methods with modified DC part is discussed. Required modifications in existing least error square based estimation algorithms are proposed. The modified DC signal model is useful for applications such as more accurate phasor estimation, distance relaying and fault locations. Simulation studies are carried out in MATLAB/Simulink to demonstrate accuracy achieved by consideration of the proposed signal model.