Open AccessAuto‐reclosing scheme with adaptive dead time control for extra‐high‐voltage transmission line
Author(s) -
Patel Ujjaval J.,
Chothani Nilesh G.,
Bhatt Praghnesh J.,
Tailor Dhaval N.
Publication year - 2018
Publication title -
iet science, measurement and technology
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.418
H-Index - 49
eISSN - 1751-8830
pISSN - 1751-8822
DOI - 10.1049/iet-smt.2018.5163
Subject(s) - fault (geology) , circuit breaker , transient (computer programming) , control theory (sociology) , engineering , transient recovery voltage , transmission line , synchronism , hardware emulation , relay , controller (irrigation) , electric power transmission , emulation , real time digital simulator , electronic engineering , voltage , electric power system , computer science , power (physics) , electrical engineering , voltage droop , embedded system , voltage source , artificial intelligence , economic growth , field programmable gate array , biology , operating system , control (management) , quantum mechanics , agronomy , physics , seismology , economics , geology
Discrimination between transient fault and permanent fault is contemporary problems for protection of transmission line. Auto‐reclosure is one of the foremost solutions for the same. This study presents the development of auto‐reclosure scheme using modified full‐cycle discrete Fourier transform with adaptive dead time control. The discrimination between transient and permanent fault is done using differential voltage across the contacts of circuit breaker. Reclosing instance is identified by comparing absolute value of positive sequence voltage, phase difference and frequency difference with a respective preset threshold using synchronism check relay. The proposed scheme has been validated by simulating power system considering variation in fault location, fault clearance angle, fault resistance and load flow in PSCAD/EMTDC. The algorithm for the auto reclosing scheme is validated in MATLAB software. Real time emulation of the proposed algorithm is performed using AVR ATmega 328P controller on laboratory prototype. The test results of simulation and hardware emulation corroborate the efficacy of the proposed technique.