Open AccessLow power 2D finite impulse response filter design using modified artificial bee colony algorithm with experimental validation using field‐programmable gate array
Author(s) -
Dwivedi Atul Kumar,
Ghosh Subhojit,
Londhe Narendra D.
Publication year - 2016
Publication title -
iet science, measurement and technology
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.418
H-Index - 49
eISSN - 1751-8830
pISSN - 1751-8822
DOI - 10.1049/iet-smt.2016.0069
Subject(s) - finite impulse response , ripple , field programmable gate array , gate array , algorithm , computer science , low pass filter , filter design , electronic engineering , filter (signal processing) , engineering , computer hardware , electrical engineering , voltage , computer vision
Motivated by the need of reducing power consumption (PC) in two dimensional (2D) finite impulse response (FIR) filters, in this work, the 2D FIR filter design task is formulated as an optimisation problem that seeks to attain the desired frequency response and reduces PC. The optimisation problem has been solved using the modified version of artificial bee colony algorithm. The applicability of the proposed approach has been evaluated by designing circular shaped 2D FIR filters for a set of specifications in frequency domain. The designed filters have been compared with other reported state of the art techniques. The evaluation is carried out in terms of pass band and stop band ripple minimisation, convergence profile and PC during filter execution in hardware. The proposed technique is found to outperform all other techniques in achieving minimum ripple for a given filter order. To prove the effectiveness of the proposed approach for PC reduction, the designed filters have been implemented in hardware using field‐programmable gate array (xc7vx485t‐2ffg1761). The PC computed using Xilinx X‐power analyser shows that 23.53% power can be saved using the proposed approach as compared with conventional design approaches.