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Short‐circuit current reduction techniques of the doubly‐fed induction generator based wind turbines for fault ride through enhancement
Author(s) -
ElNaggar Ahmed,
Erlich Istvàn
Publication year - 2017
Publication title -
iet renewable power generation
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 1.005
H-Index - 76
eISSN - 1752-1424
pISSN - 1752-1416
DOI - 10.1049/iet-rpg.2016.0372
Subject(s) - transient (computer programming) , induction generator , fault (geology) , control theory (sociology) , voltage , fault current limiter , reduction (mathematics) , wind power , low voltage ride through , grid , transient response , engineering , rotor (electric) , generator (circuit theory) , transient voltage suppressor , computer science , power (physics) , low voltage , electrical engineering , electric power system , control (management) , mathematics , physics , geometry , quantum mechanics , artificial intelligence , seismology , geology , operating system
Grid voltage disturbances result in high magnitudes of rotor currents and DC‐link voltage of the doubly‐fed induction generator based wind turbines (DFIG‐WTs), which may lead under severe fault conditions into deactivation of the machine side converter (MSC) and violation of the fault ride through (FRT) requirements of the grid codes. In this essence, several solutions were proposed, which vary between installing extra hardware components and control modification. However, the extra costs as well as the control limitations degrade the feasibility of the proposed solutions. In this study, new techniques are proposed to enhance the FRT through peak short‐circuit current reduction of the DFIG‐WT. The new techniques are developed based on the open‐loop and close‐loop dynamic response of the DFIG. The new techniques utilise the available MSC voltage, in order not to violate the voltage limits, to increase the rate of change of the DFIG internal transient voltage and to increase the magnitude of the transient impedance. Additionally, the mean variance mapping optimisation is used to optimally tune the gains in the second two techniques. The new techniques were implemented in a manufacturer‐based simulation model, and the simulation results show their effectiveness, where the maximum peak current reduction achieved was 23.6%.

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