
A topology of coupled inductor DC–DC converter with large conversion ratio and reduced voltage stress on semiconductors
Author(s) -
Eskandarpour Azizkandi Mahmoodreza,
Sedaghati Farzad,
Babaei Ebrahim
Publication year - 2020
Publication title -
iet power electronics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.637
H-Index - 77
eISSN - 1755-4543
pISSN - 1755-4535
DOI - 10.1049/iet-pel.2019.1360
Subject(s) - duty cycle , inductor , voltage multiplier , topology (electrical circuits) , boost converter , capacitor , forward converter , ćuk converter , voltage , electronic engineering , electrical engineering , control theory (sociology) , engineering , computer science , voltage regulation , dropout voltage , control (management) , artificial intelligence
This study presents a high boost DC–DC converter, integrates voltage multiplier cell, voltage lift capacitor, and coupled‐inductor techniques to achieve a high‐voltage gain. The proposed topology has the capability of extension without utilising any additional winding for a very large voltage conversion ratio. With utilising a passive clamp circuit and without requiring higher duty cycle values, the suggested converter obtains a large conversion ratio, low conduction losses, and reduced voltage stress of semiconductors with a steady value for the whole range of duty cycle. The converter operation principle is discussed and its steady‐state operation is analysed in detail. Also, theoretic efficiency calculation and design guidelines of the topology are explained. Then, the proposed DC–DC converter is compared with similar configurations to indicate its advantages. Eventually, the validity of theoretic analysis is verified using experimental measurement results of the implemented prototype with a power rating of 226 W.