Open AccessDesign, analysis and implementation of a generalised topology for multilevel inverters with reduced circuit devices
Author(s) -
Latifi Majareh Seyed Hadi,
Sedaghati Farzad,
Hosseinpour Majid,
MousaviAghdam Seyed Reza
Publication year - 2019
Publication title -
iet power electronics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.637
H-Index - 77
eISSN - 1755-4543
pISSN - 1755-4535
DOI - 10.1049/iet-pel.2019.0405
Subject(s) - pulse width modulation , inverter , waveform , modular design , topology (electrical circuits) , voltage , electronic engineering , total harmonic distortion , network topology , computer science , harmonic , modulation (music) , electronic circuit , engineering , electrical engineering , physics , quantum mechanics , acoustics , operating system
This study proposes a multilevel inverter with optimised structure from switching device number point of view. Configuration of the presented multilevel inverter is modular and extendable. Three different methods are introduced to determine the magnitude of DC voltage sources. Characteristics of inverter topology based on suggested methods are given and compared with each other. Also, the proposed multilevel inverter is compared with some similar topologies in terms of controlled switches, driver circuits, DC voltage sources and total blocking voltage to verify its advantages and probable disadvantages where the results show the superiority of the proposed topology in the comparison items. Selective harmonic elimination pulse width modulation technique is applied to achieve output voltage with high quality. Finally, a laboratory prototype of the proposed multilevel inverter is implemented and then, the experimental and simulation results are derived to validate the inverter capability in generating staircase waveforms.