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Dual‐loop control of transfer delay based PLL for fast dynamics in single‐phase AC power systems
Author(s) -
Gautam Samir,
Lu Yuezhu,
Xiao Weidong,
Lu Dylan DahChuan,
Golsorkhi Mohammad S.
Publication year - 2019
Publication title -
iet power electronics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.637
H-Index - 77
eISSN - 1755-4543
pISSN - 1755-4535
DOI - 10.1049/iet-pel.2019.0361
Subject(s) - phase locked loop , interconnection , maximum power transfer theorem , computer science , power (physics) , control theory (sociology) , dual (grammatical number) , pll multibit , dual loop , electronic engineering , loop (graph theory) , transfer function , grid , engineering , control (management) , electrical engineering , telecommunications , physics , jitter , art , literature , mathematics , quantum mechanics , combinatorics , artificial intelligence , geometry
Phase‐locked loop (PLL) is commonly utilised for AC power systems to detect phase and frequency. With the increasing use of small‐scale distributed power generation, the technique becomes widely available for grid interconnection of renewable power source into single‐phase AC distribution network. Through comprehensive analysis and design, this study proposed a new approach that includes dual independent control loops to enhance the transfer delay‐based PLL capability in terms of speed and accuracy. The effectiveness and advantages of the proposed PLL structure are demonstrated by numerical simulation and verified by experimental test.

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