Open AccessModified step‐down series‐capacitor buck converter with insertion of a Valley‐Fill structure
Author(s) -
Vecchia Mauricio Dalla,
Van den Broeck Giel,
Ravyts Simon,
Tant Jeroen,
Driesen Johan
Publication year - 2019
Publication title -
iet power electronics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.637
H-Index - 77
eISSN - 1755-4543
pISSN - 1755-4535
DOI - 10.1049/iet-pel.2018.6375
Subject(s) - capacitor , series (stratigraphy) , buck converter , electrical engineering , materials science , engineering , geology , voltage , paleontology
This study proposes a step‐down converter based on the non‐synchronous series‐capacitor buck converter. Instead of the regular capacitor of the series topology, the Valley‐Fill capacitor‐diode structure is inserted in order to extend the step‐down conversion ratio of the converter from D /2 to D /3, which leads to a gain ranging from 0 to 1/6, since the maximum allowed duty cycle is D = 0.5. The power stage employs only two active switches, five diodes, two capacitors and two inductors. The study investigates the mechanism of the Valley‐Fill structure, analyses the pulse width modulation stages during a switching period, theoretically derives the gain considering ideal and non‐ideal components, characterises the current distribution for the inductors and the voltage and current stresses among the power semiconductors and capacitors of the power stage. The proposed topology will be qualitatively and quantitatively compared to state‐of‐the‐art step‐down converters with similar gain. The study includes simulation and experimental results for a 300 V/12 V prototype up to 100 W of power and operating at 100 kHz switching frequency.